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Notes / Digital Logic

Counters and shift registers

A counter, which goes up by 1 on every clock, is the prototype of the MCU timer; a shift register, which moves bits one place at a time, is the prototype of SPI and UART.

GROUND EMBEDDED · NOTEDigital Logic 05Counters and shift registersANDABY

Counter

CLKQ0Q101230123
2-bit counter. Q0 toggles on every rising clock edge, and Q1 every time Q0 falls.

A circuit of chained flip-flops whose value increases by 1 on every clock. The CNT register of an MCU timer is exactly this.

  • Division: the top bit of a counter has the clock frequency divided by 2ⁿ. This is the principle of a prescaler.
  • Compare: the counter returns to 0 when it reaches a set number (ARR), and flipping an output when it equals another number (CCR) gives PWM.

Shift register

Serial inputQ0Q1Q2Q3parallel output
Shift register. Bits move one place sideways on every clock. Serial in, parallel out.

On every clock the stored bits move one place sideways.

  • Serial → parallel: gathers 8 bits that arrived on one line into one byte. SPI and UART receivers work like this.
  • Parallel → serial: sends out one byte a bit at a time. That is a transmitter.

With a shift-register chip such as the 74HC595, three MCU pins control 8 or 16 LEDs. It is the most common way to add pins with a single SPI link.

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