Memory hierarchy: the faster, the smaller and more expensive
Registers, cache, SRAM, Flash, external memory. Knowing the speed and capacity of each level shows you where to put a variable.
| Level | Capacity | Access time | Characteristics |
|---|---|---|---|
| Registers | Tens of bytes | 0 clocks | Inside the CPU |
| Cache / TCM | A few to tens of KB | 1 clock | High-performance cores such as the M7 |
| SRAM | Tens to hundreds of KB | 1 to 2 clocks | Variables, stack |
| Internal Flash | Hundreds of KB to a few MB | Has wait states | Code, constants; kept without power |
| External memory | MB to GB | Tens of clocks or more | SDRAM, QSPI Flash |
What to remember in embedded work
- Flash can be read, but writing is slow and limited in cycles. Storing settings needs a separate design.
- SRAM is lost when power goes off. That is why initial values are copied from Flash at boot.
- A cache can clash with DMA. If data received by DMA is not visible on a Cortex-M7, suspect cache invalidation.
Placement for fast code
Time-critical functions such as control loops are run from RAM or TCM, and frequently used variables are taken into local variables so they are computed in registers. By naming sections in the linker script you can set the location function by function.