Von Neumann and Harvard architectures
Are code and data read along the same path, or separately? Including why Cortex-M mixes the two.
Von Neumann architecture
Instructions and data use the same memory and the same bus. The structure is simple, but data cannot be read while an instruction is being fetched, so the bus becomes the bottleneck.
Harvard architecture
Instruction memory and data memory are separate, each with its own bus. Data can be read and written while the next instruction is being fetched, so it is fast. AVR (ATmega) is a typical Harvard architecture, which is why reading constants in Flash needs special means such as PROGMEM and pgm_read_byte().
Cortex-M is both
Internally the Cortex-M3/M4 is a Harvard architecture with separate instruction (I-Code) and data (D-Code, System) buses, but the address space is merged into one, so to the programmer it looks like von Neumann. That is why C can read a const array in Flash directly through an ordinary pointer.
| Architecture | Advantage | Example |
|---|---|---|
| Von Neumann | Simple, flexible | Early PCs, Cortex-M0 |
| Harvard | Simultaneous access, fast | AVR, DSPs |
| Modified Harvard | The advantages of both | Cortex-M3/M4/M7 |