ADC Sampling and Resolution Simulation

Try this

1. The yellow line is the real input voltage and the teal columns are what the ADC read. One column is one sample. The ADC holds that value until the next sample, which gives the staircase.
2. Lower Resolution from 12 bits to 3. Eight levels appear on the back wall and the columns snap to them. The gap between the yellow line and a column top is quantization error.
3. Raise the resolution again and lower the Sampling rate. Columns widen and start to miss the shape of the signal.
4. Set the input to 900 Hz and the sampling rate to 1000 Hz. In the graph below, the line through the samples looks like a slow 100 Hz wave. That is aliasing, and software cannot undo it afterwards.
5. Push Amplitude to the maximum and the wave is cut off at 0 V and 3.3 V. An ADC cannot read outside its reference range.
6. Raise Noise with 12-bit resolution and the lower bits keep flickering. More bits do not mean that much more accuracy.

How to read it

An ADC cuts two things. Cutting time is sampling, and cutting voltage is quantization.

One LSB is the reference voltage divided by 2 to the power of the bit count. With a 3.3 V reference that is about 0.8 mV at 12 bits and about 12.9 mV at 8 bits.

Half the sampling rate is the Nyquist frequency. Anything faster in the input folds down and appears as a lower frequency, which is why an RC filter sits in front of an ADC.

This lab assumes an ideal ADC. A real one also has sampling-capacitor charge time, offset error and gain error.